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Tracker Acronyms

2S Two Strip Sensor
AM Associative Memory
ASIC Application-Spcific Integrated Circuit
ATCA Advanced Telecommunications Computing Architecture
BX Bunch Cross
BE Back End
BER Bit Error Rate
BPIX Barrel of Pixel Detector
CAM  
CBC  
CIC  
CMOS Complementary MOS
CPU Central Processing Unit
CUDA Compute Unified Device Architecture
DAQ Data AcQuisition
DC Don't Care (bits)
DIB  
DF Data Formatter
DFS Data Formatting System
DTC Data Trigger and Control board
EC Endcap
ECAL Electromagnetic Calorimeter
Eff Efficiency
Et Transverse Energy
FE Front End
FEB same as DTC
FED Front End Driver
FMC FPGA Mezzanine Card
FPIX End Cap of Pixel Detector
FPGA Field Programmable Gate Array
FR Fake Rate
FRN  
FTK Fast Tracker
FTP File Transfer Protocol
GBT Gigabit Transceiver
GPGPU General Purpose GPU
GPU Graphics Processing Unit
GT  
HAPS Hybrid Active Pixel Sensor
HCAL Hadronic Calorimeter
HLT High Level Trigger
HPC - High Performance Computing
- High Pin Counting
HPK  
I2C Inter Integrated Circuit (bus)
ID Inner Detector
IPMC Intelligent Platform Management Controller
IPMI Intelligent Platform Management Interface
L1 Level 1
lpGBT low power GBT
ML Majority Logic
MIC  
MOS Metal Oxide Semiconductor
MPA  
NH  
PMOS P-type MOS
PR - Pattern Recognition
- Pattern Reconstruction
PRB Pattern Recognition Board
PRE Pattern Recognition Engine
PRM Pattern Recognition Mezzanine
PRP Pattern Recognition Platform
PS (Pixel + Strip) Sensor
PT Pattern Track
pt angular momentum
PU Pile-up
PV  
PX Pixel
RGH Random Ghost Hits
RO Read-out
ROD  
ROI Region of Interest
RTM Rear Transition Module
SCR - Silicon Carrier Region (?)
SCT Silicon Tracker
SD Silicon Detectors
SPI Serial Peripheral Interface
SS - Silicon Strip
- Super Strip
SSD Solid State Drive
TDR Technical Document Repository
TF Track Fit
TH Threashold
THR Threashold
TEC Tracker End Cap
TIB Tracker Inner Barrel
TID Tracker Inner Detector
TOB Tracker Outer Barrel
TK Tracker
TMT Time-multiplexing Technique
TPG  
TRG  
TT - Track Trigger
- Trigger Tower
TTA Trigger Tower Architecture
TTS  
VIPRAM Vertical Integrated Pattern Recognition Associative Memory
-- tecepe - 2014-07-29

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Topic revision: r3 - 2014-08-04 - tecepe
 

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